LOW POWER OPTIMIZATION OF FULL ADDER CIRCUIT BASED ON GDI LOGIC FOR BIOMEDICAL APPLICATIONS

Advanced Electronic Devices have recently become more prevalent, designers opted for low power, quick speed, and compact designs processes. Even though there are numerous design methodologies currently in use VLSI system optimization, very few techniques produce solutions that optimally optimal. GDI-based circuits becoming increasingly important since they less space, energy. The GDI technique ensures minimal propagation delay, area low-power strategies. For 45nm technology, the Cadence Virtuoso EDA tool is utilised to determine delay power. proposed examination of power performance at 1.0V voltage produced positive findings. Gate Diffusion Input concept serves as foundation this work. In order achieve a full swing output, 1-bit adder circuit using demonstrated with Full Swing Technique presented Applying suggested way complete from 14 Transistors. It evident obtained simulation results uses least amount when compared other already use. Consequently, previous designs, output overall power-delay product improved by 60 percent.